Tegra186: handlers to get BL31 arguments from previous bootloader

This patch overrides the default handlers to get BL31 arguments from the
previous bootloader. The previous bootloader stores the pointer to the
arguments in PMC secure scratch register #53.

BL31 is the first component running on the CPU, as there isn't a previous
bootloader. We set the RESET_TO_BL31 flag to enable the path which assumes
that there are no input parameters passed by the previous bootloader.

Change-Id: Idacc1df292a70c9c1cb4d5c3a774bd796175d5e8
Signed-off-by: Varun Wadekar <[email protected]>

diff --git a/plat/nvidia/tegra/include/t186/tegra_def.h b/plat/nvidia/tegra/include/t186/tegra_def.h
index 277b479e04bfdc78f028a266391e50f154232363..9a5d8a511da3bbbaa28db76d0fef1437e648454a 100644 (file)
--- a/plat/nvidia/tegra/include/t186/tegra_def.h
+++ b/plat/nvidia/tegra/include/t186/tegra_def.h
@@ -150,6 +150,8 @@
 #define  SECURE_SCRATCH_RSV6           0x680
 #define  SECURE_SCRATCH_RSV11_LO       0x6A8
 #define  SECURE_SCRATCH_RSV11_HI       0x6AC
+#define  SECURE_SCRATCH_RSV53_LO       0x7F8
+#define  SECURE_SCRATCH_RSV53_HI       0x7FC
 
 /*******************************************************************************
  * Tegra Memory Mapped Control Register Access Bus constants

diff --git a/plat/nvidia/tegra/soc/t186/plat_setup.c b/plat/nvidia/tegra/soc/t186/plat_setup.c
index ac36a14b9eb47f48d59cfede2f8581b4c4265536..261eeb084a38b13576ea3e6026b02a0b1c6378ce 100644 (file)
--- a/plat/nvidia/tegra/soc/t186/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t186/plat_setup.c
@@ -30,6 +30,7 @@
 
 #include <arch_helpers.h>
 #include <assert.h>
+#include <bl31.h>
 #include <bl_common.h>
 #include <console.h>
 #include <context.h>
@@ -226,3 +227,27 @@ void plat_gic_setup(void)
        if (sizeof(tegra186_sec_irqs) > 0)
                tegra_fiq_handler_setup();
 }
+
+/*******************************************************************************
+ * Return pointer to the BL31 params from previous bootloader
+ ******************************************************************************/
+bl31_params_t *plat_get_bl31_params(void)
+{
+       uint32_t val;
+
+       val = mmio_read_32(TEGRA_SCRATCH_BASE + SECURE_SCRATCH_RSV53_LO);
+
+       return (bl31_params_t *)(uintptr_t)val;
+}
+
+/*******************************************************************************
+ * Return pointer to the BL31 platform params from previous bootloader
+ ******************************************************************************/
+plat_params_from_bl2_t *plat_get_bl31_plat_params(void)
+{
+       uint32_t val;
+
+       val = mmio_read_32(TEGRA_SCRATCH_BASE + SECURE_SCRATCH_RSV53_HI);
+
+       return (plat_params_from_bl2_t *)(uintptr_t)val;
+}

diff --git a/plat/nvidia/tegra/soc/t186/platform_t186.mk b/plat/nvidia/tegra/soc/t186/platform_t186.mk
index 4a4d9bbda3b083ba5c9c7d34d835121200f14432..b62d47da0d32967f33e50a1111c029c29eabc6f3 100644 (file)
--- a/plat/nvidia/tegra/soc/t186/platform_t186.mk
+++ b/plat/nvidia/tegra/soc/t186/platform_t186.mk
@@ -32,9 +32,18 @@
 ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS        := 1
 $(eval $(call add_define,ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS))
 
+RELOCATE_TO_BL31_BASE                  := 1
+$(eval $(call add_define,RELOCATE_TO_BL31_BASE))
+
 ENABLE_CHIP_VERIFICATION_HARNESS       := 0
 $(eval $(call add_define,ENABLE_CHIP_VERIFICATION_HARNESS))
 
+RESET_TO_BL31                          := 1
+
+PROGRAMMABLE_RESET_ADDRESS             := 1
+
+COLD_BOOT_SINGLE_CPU                   := 1
+
 # platform settings
 TZDRAM_BASE                            := 0x30000000
 $(eval $(call add_define,TZDRAM_BASE))